1. Field of the Invention
The present invention relates to an image pickup apparatus.
2. Description of the Related Art
Image sensors are proposed, in which column parallel analog-to-digital (AD) converters (each including an AD converter for every pixel column) are installed as pixel readout circuits. The column parallel AD converters compare pixel signals with ramp reference signals with comparators and count the times from start of conversion to inversion of the outputs from the comparators to perform AD conversion. The column parallel AD converters each have the low-speed AD converter for every pixel column to perform the AD conversion in parallel. Accordingly, it is possible to reduce the bandwidths of the comparators and amplifiers composing the column parallel AD converters, so that the column parallel AD converters have the advantages over other AD conversion methods in terms of signal-to-noise (S/N) ratio. In order to reduce the noises in the column parallel AD converters, it is necessary to reduce the bandwidths of the comparators and the column amplifiers as much as possible to suppress white noises outside the signal bandwidths. In particular, since the bandwidths of the comparators downstream of analog blocks can be reduced to limit the noise bandwidths of the pixels, the column amplifiers, and the comparators, it is possible to efficiently reduce the noises.
Japanese Laid-Open Patent No. 2010-093641 describes a method of limiting a bandwidth by using a mirror effect of transistors in order to efficiently reduce the bandwidth of a first stage of a comparator including two-stage amplifiers with a smaller capacitance. In this method, the mirror effect is used to decrease the capacitance charged and discharged with the current from the first stage of the comparator, thereby reducing inversion delay of the comparator. However, the amount of inversion delay in the comparator is determined by the bandwidth of the comparator and the time constant required for the charge and discharge of the current. Accordingly, only decreasing the capacitance of the charge and discharge by using the mirror effect achieves limited improvement of the inversion delay. In addition, since the inversion delay in the comparator is varied with the inclination of a ramp reference voltage that is input, it is difficult to impose appropriate bandwidth limitation in a method of fixedly setting a bandwidth limiting capacitance.
Japanese Laid-Open Patent No. 2007-281540 describes a technology to allow alleviation of the effect of supply voltage drop caused by the inversion of a comparator by using a capacitance between an output signal line of the first stage of the comparator and a power supply and reduction in noise by the bandwidth limitation in the first stage of the comparator. However, as in Japanese Laid-Open Patent No. 2010-093641, it is difficult to achieve appropriate noise reduction effect without decreasing the frame rate in the method of fixedly setting a bandwidth limiting capacitance because of the effect of the inversion delay varied with the inclination of the ramp reference voltage.
In the column parallel AD converters, the method of imposing the bandwidth limitation of the comparators is effectively used in order to improve the S/N ratio. However, in the bandwidth limitation using fixed capacitances, when the inclinations of the ramp reference voltages are varied, the inversion delay in the comparators is increased because the bandwidths of the comparators are too narrow to reduce the frame rate or it is not possible to sufficiently reduce the noises because the bandwidths of the comparators are too wide. Accordingly, it is necessary to vary the bandwidths of the comparators in accordance with the variation in inclination of the ramp reference voltages in the image pickup apparatuses using the column parallel AD converters.